以 IP(Intellectual Property )核復用為基礎的SoC（System on a Chip，簡稱SoC）設計是以軟硬件協同設計為主要設計方法的芯片設計技術。本文從IP 核復用技術、軟硬件
協同設計技術兩個方面探討了SoC 設計中的關鍵技術。其中以OCP 及Wishbone 總線為例，總結了片上總線的特點及其接口技術，討論了IP 核復用技術的應用方法及優勢；通過與傳統的IC 設計相比較，描述了軟硬件協同設計的流程特征，并探討了軟硬件協同仿真技術，同時其發展趨勢作了展望。
[關鍵詞]SoC：IP 復用：協同設計：驗證；技術
[Abstract] The main design method of SoC technology based on IP(Intellectual
Property) core reuse technology is hardware and software co-design technology. The
paper discussed the critical technologies of SoC design, they include IP reuse
technology and co-design technology. The characteristics and connection technology
of SoC bus are summed with an example of Wishbone Bus. Comparing with the traditional
IC design method, design flow of software/hardware co-design is also discussed, The
problems of research in the future are as well analyzed in this paper.
[Key words] SoC: IP reuse: co-design : Verification: Technology