利用FPGA實(shí)現(xiàn)時(shí)分多址的方法有很多種，但大多數(shù)方法都對(duì)FPGA芯片資源的占用非常巨大。針對(duì)這一問(wèn)題，提出一種改進(jìn)型方法來(lái)實(shí)現(xiàn)時(shí)分多址。通過(guò)使用FPGA芯片內(nèi)部的雙口隨機(jī)訪問(wèn)存儲(chǔ)器（雙口RAM），利用同一塊RAM采用兩套時(shí)鐘線，地址線和數(shù)據(jù)線，例化雙口RAM的IP核后，在占用較少FPGA芯片資源的前提下，信號(hào)實(shí)現(xiàn)了時(shí)分多址格式的傳輸。通過(guò)對(duì)程序進(jìn)行仿真和驗(yàn)證，證明了該算法的可用性，與傳統(tǒng)方法相比，芯片資源的占用率明顯降低。

Abstract:

?There were lots of methods which could realize the TDMA transmission by FPGA, but many methods occupied too much resources on the FPGA chip. To solve this problem, the paper presented an improved method to realize the time division multiple access, through the using of dual-port random access memory （RAM） on the chip, and with the same piece of RAM used two clock lines, address lines and data lines, by the IP core of dual-port’s cited, we could achieve a TDMA transmission frame format by occupying less FPGA chip resources. With simulating and verifying to the method, the availability of the method is validated. Compared with traditional methods, the chip resource utilization reduces obviously.