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電子發(fā)燒友網(wǎng)>電子資料下載>IC datasheet pdf>IT8702F pdf datasheet (Super –

IT8702F pdf datasheet (Super –

2008-12-15 | rar | 333 | 次下載 | 5積分

資料介紹

The IT8702F is a Low Pin Count Interface-based highly integrated Super I/O. The IT8702F provides the most
commonly used legacy Super I/O functionality plus the Fan Speed Controller and Smart Card Reader
Interface. The device’s LPC interface complies with Intel “LPC Interface Specification Rev. 1.0”. The IT8702F
is ACPI & LANDesk compliant.
The IT8702F features a PC/SC and ISO 7816 compliant Smart Card Reader. The IT8702F contains one
game port which supports 2 joysticks, 1 MIDI port, and 1 Fan Speed Controller. The fan speed controller is
responsible to control 5 fan speeds through three 128 steps of Pulse Width Modulation (PWM) output pins
and to monitor five FANs’ Tachometer inputs. It also features two 16C550 UARTs, one IEEE 1284 Parallel
Port, one Floppy Disk Controller and one 8042 Keyboard Controller.
The IT8702F has integrated 12 logical devices. One high-performance 2.88MB floppy disk controller, with
digital data separator, supports two 360K/ 720K/ 1.2M/ 1.44M/ 2.88M floppy disk drives. One multi-mode
high-performance parallel port features the bi-directional Standard Parallel Port (SPP), the Enhanced Parallel
Port (EPP V. 1.7 and EPP V. 1.9 are supported), and the IEEE 1284 compliant Extended Capabilities Port
(ECP). Two 16C550 standard compatible enhanced UARTs perform asynchronous communication, and also
support either IR or MIDI interfaces. One game port with built-in 558 quad timers and buffer chips supports
direct connection of 2 joysticks. The device also features one MPU-401 UART mode compatible MIDI port,
one fan speed controller responsible for controlling / monitoring 5 fans and 5 GPIO ports (38 GPIO pins). The
IT8702F also has an integrated 8042 compatible Keyboard Controller with 2KB of programmable ROM for
customer application.
These 12 logical devices can be individually enabled or disabled via software configuration registers. The
IT8702F utilizes power-saving circuitry to reduce power consumption, and once a logical device is disabled
the inputs are gated inhibit, the outputs are tri-state, and the input clock is disabled. The device requires a
single 24/48 MHz clock input and operates with +5V power supply. The IT8702F is available in 128-pin QFP
(Quad Flat Package).
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