進(jìn)行母嬰心電信號(hào)分離需要大量數(shù)據(jù)存儲(chǔ)和運(yùn)算，實(shí)時(shí)性要求高，要求有一個(gè)能夠滿足存儲(chǔ)容量和計(jì)算時(shí)間需求的硬件平臺(tái)，故本系統(tǒng)采用基于ARM 核的32 位低功耗微處理器S3C44B0X 作為核心，在嵌入式操作系統(tǒng)uC/OS-Ⅱ下實(shí)現(xiàn)胎兒心電信號(hào)的數(shù)據(jù)采集分離與顯示；論文詳細(xì)介紹了系統(tǒng)硬件電路的主要接口設(shè)計(jì)和軟件實(shí)現(xiàn)的方法。
關(guān)鍵詞 μC/OS-Ⅱ 胎兒心電 ARM微處理器 系統(tǒng)移植
Abstract Realizing the separation algorithm of FECG needs mass data storage and processing, and high real-time performance,which demands a hardware platform statisfying the storage capacity and the computing demand,so the system uses the 32-bit low-power S3C44B0X micro-processor on the basis of ARM nuclear as the core, and accomplishes the sampling and displaying of FECG with an embedded uC/OS-II operation system. At the same time , this project introduces particularly the main interface of system hardware circuit and software implementation means.
Keywords μC/OS-Ⅱ FECG ARM processor system transplantation