資料介紹
The TS5N412 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N412 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.
The TS5N412 is a 4-bit 1-of-2 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
- PCA9536,pdf(Remote 4-Bit I2C a
- TS2PCIE412,pdf(4-Channel 8:16
- TXB0104-Q1,pdf(4-Bit Bidirecti
- TXB0104,pdf(4-Bit Bidirectiona
- TS5V330C,pdf(4 Bit 1-of-2 FET
- TS5V330,pdf(QUAD SPDT WIDE-BAN
- TS3V340,pdf(QUAD SPDT WIDE-BAN
- TS3V330,pdf(QUAD SPDT WIDE-BAN
- TS5L100,pdf(QUAD SPDT WIDE-BAN
- TS3L110,pdf(QUAD SPDT HIGH-BAN
- TS3L100,PDF(QUAD SPDT WIDE-BAN
- TS5N214,pdf(2-BIT 1-OF-4 FET M
- TS5N118,pdf(1-OF-8 FET MULTIPL
- SN74LV393A-Q1,pdf(Dual 4-Bit B
- CDP1857C pdf datasheet(4-Bit B
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