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電子發燒友網>電子資料下載>IC datasheet pdf>MAX17480 pdf datasheet (AMD 2-

MAX17480 pdf datasheet (AMD 2-

2009-03-02 | rar | 322 | 次下載 | 5積分

資料介紹

The MAX17480 is a triple-output, step-down, fixed-frequency controller for AMD’s serial VID interface (SVI) CPU and northbridge (NB) core supplies. The MAX17480 consists of two high-current SMPSs for the CPU cores and one 4A internal switch SMPS for the NB core. The two CPU core SMPSs run 180° out-of-phase for true interleaved operation, minimizing input capacitance. The 4A internal switch SMPS runs at twice the switching frequency of the core SMPS, reducing the size of the external components.

The MAX17480 is fully AMD SVI compliant. Output voltages are dynamically changed through a 2-wire SVI, allowing the SMPSs to be individually programmed to different voltages. A slew-rate controller allows controlled transitions between VID codes and controlled soft-start. SVI also allows each SMPS to be individually set into a low-power pulse-skipping state.

Transient phase repeat improves the response of the fixed-frequency architecture, reducing the total output capacitance for the CPU core. A thermistor-based temperature sensor provides a programmable thermal-fault output (active-low VRHOT).

The MAX17480 includes output overvoltage protection (OVP), undervoltage protection (UVP), and thermal protection. When any of these protection features detect a fault, the controller shuts down. True differential current sensing improves current limit and load-line accuracy. The MAX17480 has an adjustable switching frequency, allowing 100kHz to 600kHz operation per core SMPS, and twice that for the NB SMPS.

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