--- 產品詳情 ---
Bus voltage (Max) (V) | 20 |
Power switch | MOSFET |
Input VCC (Min) (V) | -0.3 |
Input VCC (Max) (V) | 20 |
Peak output current (A) | 3 |
Rise time (ns) | 17 |
Operating temperature range (C) | -40 to 105 |
Undervoltage lockout (Typ) | 4 |
Rating | Catalog |
Number of channels (#) | 2 |
Fall time (ns) | 17 |
Prop delay (ns) | 60 |
Iq (uA) | 220000 |
Input threshold | TTL |
Channel input logic | TTL |
Negative voltage handling at HS pin (V) | 0 |
Features | Dead Time Control, Soft Switching, Synchronous Rectification |
Driver configuration | Inverting, Non-Inverting |
- Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
- Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
- 12-V or 5-V Input Operation
- 3.3-V Input Operation With Availability of 12-V Bus Bias
- High-Side and Low-Side ±3-A Dual Drivers
- On-Board 6.5-V Gate Drive Regulator
- ±3-A TrueDrive? Gate Drives for High Current Delivery at MOSFET Miller Thresholds
- Automatically Adjusts for Changing Operating Conditions
- Thermally Enhanced 14-Pin PowerPAD? HTSSOP Package Minimizes Board Area and Junction Temperature Rise
- APPLICATIONS
- Multiphase Converters in Combination With the TPS40090
- Non-Isolated 3.3-V, 5-V and 12-V Input dc-to-dc Converters for Processor Power, General Computer, Telecom and Datacom Applications
Predictive Gate Drive? and PowerPAD? are trademarks of Texas Instruments Incorporated.
The UCC27223 is a high-speed synchronous buck drivers for today?s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive? (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s).
The UCC27223 includes an enable pin that controls the operation of both outputs. A logic latch is also included to keep both outputs low until the first PWM input pulse comes in. The RDS(on) of the SR pull-down sourcing device is also minimized for higher frequency operations.
This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.
The UCC27223 is offered in the thermally enhanced 14-pin PowerPAD? package with 2°C/W jc.
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