--- 產(chǎn)品詳情 ---
Technology Family | LVC |
Bits (#) | 8 |
High input voltage (Min) (Vih) | 1.08 |
High input voltage (Max) (Vih) | 5.5 |
Vout (Min) (V) | 1.65 |
Vout (Max) (V) | 5.5 |
IOH (Max) (mA) | -32 |
IOL (Max) (mA) | 32 |
Rating | Catalog |
- Control Inputs (DIR and OE) VIH and VIL Levels
are Referenced to VCCA - Bus Hold on Data Inputs Eliminates the Need for
External Pullup and Pulldown Resistors - VCC Isolation
- Fully Configurable Dual-Rail Design
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II - ESD Protection Exceeds JESD 22
The SN74LVCH8T245 is an 8-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.
The SN74LVCH8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs, the A-port outputs, or place both output ports into a high-impedance state. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports are always active.
The SN74LVCH8T245 is designed so that the control pins (DIR and OE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device.
The VCC isolation feature ensures that if either VCCA or VCCB is at GND, then the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
為你推薦
-
TI數(shù)字多路復(fù)用器和編碼器SN54HC1512022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器SN54LS1532022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器CD54HC1472022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器CY74FCT2257T2022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器SN74LVC257A2022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器SN74LVC157A2022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器SN74ALS258A2022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器SN74ALS257A2022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器SN74ALS157A2022-12-23 15:12
-
TI數(shù)字多路復(fù)用器和編碼器SN74AHCT1582022-12-23 15:12
-
【PCB設(shè)計必備】31條布線技巧2023-08-03 08:09
相信大家在做PCB設(shè)計時,都會發(fā)現(xiàn)布線這個環(huán)節(jié)必不可少,而且布線的合理性,也決定了PCB的美觀度和其生產(chǎn)成本的高低,同時還能體現(xiàn)出電路性能和散熱性能的好壞,以及是否可以讓器件的性能達到最優(yōu)等。在上篇內(nèi)容中,小編主要分享了PCB線寬線距的一些設(shè)計規(guī)則,那么本篇內(nèi)容,將針對PCB的布線方式,做個全面的總結(jié)給到大家,希望能夠?qū)︷B(yǎng)成良好的設(shè)計習慣有所幫助。1走線長度1682瀏覽量 -
電動汽車直流快充方案設(shè)計【含參考設(shè)計】2023-08-03 08:08
-
Buck電路的原理及器件選型指南2023-07-31 22:28
-
100W USB PD 3.0電源2023-07-31 22:27
-
千萬不要忽略PCB設(shè)計中線寬線距的重要性2023-07-31 22:27
想要做好PCB設(shè)計,除了整體的布線布局外,線寬線距的規(guī)則也非常重要,因為線寬線距決定著電路板的性能和穩(wěn)定性。所以本篇以RK3588為例,詳細為大家介紹一下PCB線寬線距的通用設(shè)計規(guī)則。要注意的是,布線之前須把軟件默認設(shè)置選項設(shè)置好,并打開DRC檢測開關(guān)。布線建議打開5mil格點,等長時可根據(jù)情況設(shè)置1mil格點。PCB布線線寬01布線首先應(yīng)滿足工廠加工能力,1770瀏覽量 -
基于STM32的300W無刷直流電機驅(qū)動方案2023-07-06 10:02
-
上新啦!開發(fā)板僅需9.9元!2023-06-21 17:43
-
參考設(shè)計 | 2KW AC/DC數(shù)字電源方案2023-06-21 17:43
-
千萬不能小瞧的PCB半孔板2023-06-21 17:34