| Supply voltage (Min) (V) | 4.75 |
| Supply voltage (Max) (V) | 5.25 |
| Input type | Bipolar |
| Output type | 3-State, Open-Collector |
| Clock Frequency (Max) (MHz) | 25 |
| Features | Unidirectional |
- Expanded Family of Standard and Low Power PROMs
- Titanium-Tungstem (Ti-W) Fuse Links for Reliable Low-Voltage Full-Family-Compatible Programming
- Full Decoding and Fast Chip Select Simplify System Design
- P-N-P Inputs for Reduced Loading On System Buffers/Drivers
- Each PROM Supplied With a High Logic Level Stored at Each Bit Location
- Applications Include:
Microprogramming/Firmware Loaders
Code converters/Character Generators
Translators/Emulators
Address Mapping/Look-Up Tables
The 24 and 28 Series of monolithic TTL programmable read-only memories (PROMs) feature an expanded selection of standard and low-power PROMs. This expanded PROM family provides the system designer with considerable fexibility in upgrading existing designs or optimizing new designs. Featuring proven titanium-tungsten (Ti-W) fuse links with low-current MOS-compatible p-n-p inputs, all family members utilize a common programming technique designed to program each link with a 20-microsecond pulse.
The 4096-bit and 8192-bit PROMs are offered in a wide variety of packages ranging from 18-pin 300 mil-wide thru 24 pin 600 mil-wide. The 16,384-bit PROMs provide twice the bit density of the 8192-bit PROMs and are provided in a 24 pin 600 mil-wide package.
All PROMs are supplied with a logic-high output level stored at each bit location. The programming procedure will produce open-circuits in the Ti-W metal links, which reverses the stored logic level at the selected location. The procedure is irreversible; once altered, the output for that bit location is permanently programmed. Outputs that have never been altered may later be programmed to supply the opposite output level. Operation of the unit within the recommended operating conditions will not alter the memory content.
Active level(s) at the chip-select inputs(s) (S or S\) enables all of the outputs. An inactiv elevel at any chip-select input causes all outputs to be in the three-state, or off condition.
